4Vpp,+2V offset, Square Wave, Frequency
Generator with 50 ohm drive. (i.e. TTL
||TTL Compatable, 50
ohm , Signal for FEC Triggers. Note: A
calibrate trigger results in a Normal
Trigger being generated, 16 clocks later.
This means only a single pulser is
necessary for generating a Calibration
readout from a readout chip.
||A PC with USB port
and PCI slot running Redhat Linux 7.1
(for 20MHz ADC) or Linux 7.3 (for 40 MHz
control software, ?
||20 MHz - Cyber
Research PCI DAQ 2012 with +/-1V input
40 MHz - Gage CompuScope
Controller Board 2*
TBM 03 Test
Read Out Chip
mounted on Adapter Board.
||1 - USB Cable (4
pin to 2 pin) for FEC
1 - Power
Brick for FEC*
1 - 34 IDC Cable from FEC to TBM
1 - 34 IDC
Cable < 1 foot long from TBM to ROC Adapter
2 - Custom
Power Cable for TBM
and FEC (for ADC Clock
2 to 7 - 50
ohm, BNC cables for clock and trigger (Depending on
1 - 50 ohm,
Lemo to BNC Cable for Analog Output to ADC
(* Supplied by
with questions, comments, or update information.