Communications HUB

Slow HUB

Addressing Sequence

 

Hub Address Command Sequence

NOTE: Slow Hub uses CLK+T1. So data
must be transmitted using this clock. Slow
Hub Address is transmitted at system clock
rate, all other data is transmitted using at a
rate of CLK+T1/64 as shown in timing diagram
.

Start Signal
Start Signal**
Hub Address Bit 4
Hub Address Bit 3
Hub Address Bit 2
Hub Address Bit 1
Hub Address Bit 1 Inverted
Hub Address Bit 0
Port Address Bit 2
Port Address Bit 1
Port Address Bit 0
Port Address Bit 0 Inverted*

* In future revision, this bit will be
replaced by a Parity Bit.

Parity Bit = XNor [HA4, HA3,
HA2, HA1, HA0, PA2, Pa1, Pa0]

** Possible future revision would allow the Slow
hub to switch between the CLK+T1 Clock & the
PLL output clock. This would remove the need
for a second start Signal.



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Rev  05/07/02

Contact bartz@physics.rutgers.edu
with questions, comments, or update information.


Sketch of Serin Lab